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Evaluation Essay, 29 pages (7000 words)

Component evaluation at microwave frequencies health and social care essay

ISIBOR EHI OBUHStudent ID: 200737466Submitted in accordance with the requirements for the degree ofMaster of Sciencein Communications EngineeringSupervisor: Mr Roland G. ClarkeAssessor: Dr Dragan IndjinThe University of LeedsSchool of Electronic and Electrical EngineeringApril 2013

Declaration of Academic Integrity

The candidate confirms that the work submitted is his/her own, except where work which has formed part of jointly-authored publications has been included. The contribution of the candidate and the other authors to this work has been explicitly indicated in the report. The candidate confirms that appropriate credit has been given within the report where reference has been made to the work of others. This copy has been supplied on the understanding that no quotation from the report may be published without proper acknowledgement. The candidate, however, confirms his/her consent to the University of Leeds copying and distributing all or part of this work in any forms and using third parties, who might be outside the University, to monitor breaches of regulations, to verify whether this work contains plagiarised material, and for quality assurance purposes. The candidate confirms that the details of any mitigating circumstances have been submitted to the Student Support Office at the School of Electronic and Electrical Engineering, at the University of Leeds. ISIBOR EHI OBUHDate: 01/04/2013

Abstract

SMDs in PCB layouts, have their intrinsic response, over the microwave band, impacted by parasitic effects, board and substrate interactions. These non-ideal responses of SMDs require investigation and the synthesis of an equivalent circuit model. The model must account for these effects and ensure an appropriate characterization of the device in service; conditions, if not considered, would present as sources of interference, circuit response degradation, and other detrimental consequences like signal distortion, drift and loss. In this report, an equivalent circuit model, which describes these non-ideal behaviour of SMDs in a typical board layout would be developed using a simple calibration technique and AWR Microwave office’s optimization routine, from extracted in-situ S-parameters measurements of the component or device. The extraction of the equivalent circuit model derives from a simple phase delay (electrical length) calibration procedure, which extends the SOL calibration of the VNA towards the DUT and assumes negligible contributions from pad footprints and solder joint parasitics in a two port measurement setup. An examination of the equivalent circuit response with respect to the obtained in-situ measurements, justified the approach, providing good agreements for the compared responses. This work also presents the plan for the more rigorous TRL calibration technique, to be employed, in the main thesis, with the prospect of characterizations involving non-series SMD-fixture arrangements.

Table of Contents

List of Abbreviations

List all acronyms used in the text, with their full definition, in alphabetic order. Example:

LSI

PCB

SMA

SMD

SOL

TRL

Large Scale IntegrationPrinted Circuit BoardSub-Miniature Version A (SMA)Surface Mount DevicesShort-Open-LoadThru-Reflect-Load

VLSI

VNA

Very Large Scale IntegrationVector Network Analyser

Chapter 1

The performance of electronic circuits is dependent on the agreement of the response of the realized product with design objectives. Remediation of response deviations is implemented by tuning or through the allowance of circuit and board imperfections in the original design phase. With miniaturization, becoming the choice production option for electronic circuits, and the high frequency band of operation for RF circuits offering little possibilities for the tuning option, it is prudent to have an estimation or characterization of the behaviour of the components in the realized layout, accounted for in the design phase. The intrinsic responses of Surface Mount Devices (SMDs) in the microwave frequency band are ” impacted by parasitic effects, board layout configurations and substrate interactions [Nai01b]”. These deviations require an evaluation and the synthesis of an equivalent circuit model that accounts for service condition effects. This endeavour is imperative for circuit designs that seek a specific and predictable response in the environment of operation. The extraction of the equivalent circuit model derives from the simple in-fixture phase delay calibration technique and the execution of an optimization routine for compared responses. This procedure entails a measurement of the phase delay or electrical length of the transmission line, as an extension of the Short-Open-Load (SOL) VNA calibration, towards the DUT, and the consequent removal of fixture effects to obtain only measurements for the device under test (DUT). It assumes that the transmission line is well behaved for the frequency range of measurement; and, negligible footpad to line distortions are at the SMD-to-microstrip interface; also; mismatch discontinuities at the coaxial-to-strip transition are minimal. To make this endeavour clearer, we would begin with an overview of SMD components and measurements motivation.

1. 1 SMD components and measurements motivation overview

Surface mount devices (SMD) respond to the requirements of miniaturization and are described by industry standards for various RF applications. Large Scale Integration (LSI) techniques -large scale to very- and ultra-large scale (VLSI, ULSI)-provide for the maximization of ” the ratio of silicon area to the wiring board [Unn00]” , upon which miniaturization is hinged. The progress with LSI and surface mount technologies has provided the needed platform for SMD to thrive, with the shrinking of the aperture ratios of electronic assemblies ” to 0. 4 whilst maintaining transfer efficiencies in excess of 70-75% [Whi10]”, via the elimination of the through hole method, and a corresponding increase in the optimization of production automation techniques. [Str98] lists wave-soldering in nitrogen, reflow soldering and impulse soldering procedures as the most employed soldering procedures for SMDs in PCBs. It however comes with increased complexity, power and thermal dissipation problems and adaptation for multiple pin components like the ICs.” Green sheet technology in combination with the technique for printing conductive layers [Men09]” is used for the manufacture of SMD components. SMDs are broadly classified into ” active and passive electronic components [Mah06]”. The former consists of capacitors, resistors and inductors, whereas the latter comprises transistors, diodes and integrated circuits. An industrial classification of SMDs makes for groupings, according to shape and the number of (Input/Output) IO pins: Melfs (Metal Electrode Faced components)ChipsLeadless ceramic chip carriers (LCCCs)PLCCs (plastic leadless chip carriers)Small-outline SMDs (SOs)Tape-automated bonding chips andBall-grid arrays (BGAs)Standardization is provided by the Electronic Industries Association (EIA). [IPC93] standards collection brochure makes the delineation for various types of SMDs as shown in figure 1. 1. C: UsersPublicDocumentsSMD_main. jpgFigure 1. 1: Surface Mount Design and Land Pattern Standards [IPC93]The radio frequency (RF) industry makes extensive use of ” passive SMDs, such as thin-film inductors, capacitors and resistors [Nai01a]”, on printed circuit boards (PCBs) with the various soldering techniques as described in [Str98]. RF being a range of frequencies covering 3 KHz to 300 GHz, and having the microwave band (300MHz to 3GHz ) as a subset frequency band. Capacitors in microwave circuits are used for ” RF coupling between circuit stages and for DC bias in network bypass [Nai01b]”; inductors on the other hand, provide for DC isolation and ripple smoothening; whereas resistors are generally used for voltage limiting requirements. At RF frequencies, parasitic effects, derived from the pad footprint, board layouts and component packaging, become more pronounced. These parasitic effects cause a drift in the ideal response of the SM, the off-board response, and can lead to ” signal distortion, loss, crosstalk and resonant coupling [Nai01a]”. This deviation implies that the admission of these contributions or environment influences, in the design process, is necessary for the SMD to meet the intended circuit function, and the justification of efforts aimed at the development of models and measurements for their characterization. Characterization in the designed PCB layout environment is termed extrinsic characterization, whereas the intrinsic characterization excludes any” interactions between the component and the environment [Nai01c].” Data, describing the extrinsic response of the device, is derived from electromagnetic measurements (EM), and can be used for the synthesis of the equivalent circuit model of devices. Computer Aided Design (CAD) applications like the AWR 2010 Microwave office™, allow for this synthesis with the curve fitting optimization routine, and is” well suited for simple circuit configurations [Nai01a]”. The characterization of these SMDs requires knowledge of their direct current resistance, self-resonant frequency, Q factor and their ideal capacitance or inductance- for capacitor and inductor respectively. A vector network analyser (VNA) provides for these EM measurements in the microwave frequency range via a two port measurement setup. The ” degree of accuracy of these measurements is dependent on the test fixture and instrument [Men09]”. The output data of the VNA are S-parameters, which for the extrinsic model, includes the influence of the test fixture and the device. Extraction of the S-parameters of the device under test (DUT) involves two main industry established in-fixture calibration techniques, and in a narrower parlance description, is referred to as de-embedding. The first technique uses the measured data for processing into other matrix formats –T-parameters and ABCD parameters- as required with de-embedding procedures, to make for the isolation of the test fixture; the other uses the network analyser to directly perform the calibration and de-embedding calculations and allows observations in real time. The former is referred to as the static approach and the latter, the real-time approach. A derivative of the static approach seeks to correct for phase delay of the transmission line and it is the simplest form of in-fixture calibration. It is based on the assumption that the test fixture is a perfect transmission line of some known phase length, without losses, a linear phase response, and of constant impedance. The extraction of the lumped elements model of the device follows after the subtraction of the phase lengths from the composite measurement. This technique is hinged on ” fixture performance and provides a sufficient degree of accuracy [Agi04]” for simple layouts and quick measurements. Notably, it however fails to compensate for fixture losses and impedance discontinuities, and the resultant mismatch interaction at the ” coaxial-to-fixture transition[Agi04]”. This report would present this simple extraction technique for the characterization of an SMD inductor and capacitor, serving as flagship procedure, for more rigorous TRL calibration technique to be adopted in the main project phase.

1. 2 Outline of Report

Chapter 2 explores standard calibration techniques; locates the parameters of characterization as derivatives of S-parameters, and examines standard lumped models of SMDsChapter 3 presents the results of in-fixture calibration technique which will be employed for the characterization of the SMDs, via appropriate equivalent circuit models, calculations and the optimization routine implemented in AWR, Microwave office. A comparison of the response of the extracted equivalent circuit model for the SMD in the circuit, with that of the imported file, and datasheet specification, is also provided. Chapter 4 presents the summary and conclusions drawn from the report and the plan for an examination of the TRL calibration procedure highlighted above, in the main project phase. This plan is also included in the appended grant chart and table.

Chapter 2

Calibration and de-embedding techniques; and SMD equivalent circuit modelsMeasurement of the performance of SMD components requires test equipment equipped with matching interfaces for the layout environment. Traditional microwave packages were enabled with coaxial interfaces, thus making for the ease of series extensions and test node fittings. Performance evaluation with these traditional coaxial interfaces is easily performed with ” test equipment that use similar coaxial interfaces [Agi04]’’. However, the modern approach, which is in the favour of high density component integration, reduced power consumptions and cost, has evolved into designs in favour of the printed circuit board (PCB) and SMDs, with the traditional coaxial interface nearing elimination in final circuit implementations. Hence performance evaluation of SMDs on the transmission line would require an adaptation of the coaxial interface to the line, but this is not without contributions from associated impedance discontinuities, losses and parasitic fixture effects. This makes accurate characterization of SMDs a challenge, hence the definition of calibration procedures or standards that aim to eliminate these fixture effects, while ensuring that the obtained performance measurement result is essentially that of the DUT. We will proceed with an overview of various calibration techniques, an examination of S-parameters as microwave response representation, the electrical and geometrical properties of the microstrip, a study of the lumped equivalent circuit models of an inductor and capacitor and their electrical dependencies.

2. 1 Standard calibration procedures

Calibration is described as the sum of processes aimed at determining the actual performance and accuracy of a measuring instrument , with a set to standards or lab instruments having significantly better performance, and the ” adjustment of the measuring instrument into alignment with the standard [WWW01]” . Calibration can also be rephrased as the process of measuring the actual performance of an instrument-under-test using lab instruments that in turn have significantly better accuracy than the instrument-under-test. Off the shelf calibration kits for VNAs employ standard short-open-load (SOL) calibration standards at the coaxial ports of the network analyser, effectively correcting for the effects of the adapters, cables and the internal reference of the network analyser. However, for the intended evaluation of the SMD on a fixture, the effects of the fixture and transition discontinuities are unaccounted for with only SOL based, VNA calibrations. An in-fixture calibration is thus preferable, hence the number of calibration procedures that attempt to extend the calibration, for the elimination of the effects of the test fixture from the overall measurements. The most popular of the calibration techniques include the following: Reference plane rotationNormalizationTime domain gatingDe-embeddingSOLTTRL

2. 1. 1Reference plane rotation calibration technique

The Reference plane rotation calibration technique comprises of two techniques: electrical delay and port extension techniques. With the latter, a delay is added to the reference signal path to make up for the phase due to the fixture length, whereas the latter subtracts the delay seen at each port, hence extending the reference plane at each test port, through the fixture to the device. Either effectively removes the ” effects of the fixture’s length from the measurement [Agi00]” . Both methods are hinged on the assumption that the fixture has negligible losses and mismatch, along the length or transitions.

2. 1. 2Normalization calibration technique

This technique is most suited for higher frequency applications where magnitude and phase shifts result between the device and fixture, due to measureable losses in the fixtures. It uses simple in-fixture standards to measure the loss and length of the fixture, employing an ” open/short standards for the reflection measurements or a thru for transmission measurements [Agi00]”

2. 1. 3Time domain gating

In time domain gating, time domain response obtained from the inverse fast Fourier transform (FFT) of the test fixture frequency response, is removed by selectively ” setting the gate start and stop markers only around the device[Agi00]”, with a time domain gate. The activation of this time domain gate makes for the elimination of responses outside the gate. With the device time domain response obtained, its frequency domain response can be easily observed and the data considered to be free of the effects of the fixture. Time domain gating procedure is based assumption that the fixture has negligible losses.

2. 1. 4De-embedding

De-embedding is a mathematical process that eliminates the fixture effects from the overall measurement data, by subtracting the equivalent network that represents the fixture. It assumes that the fixture characteristics are well known hence the an accurate model of the fixture is imperative for the accuracy of the results. The two common ways to represent a fixture are: with measured S-parameter data and the other, with modelled data. The fixture halves are represented by an equivalent lumped element component model, obtained by calculating the effects of the fixture at each ” measurement frequency using a linear simulator [Agi00]”. These modelled S-parameters of the fixture are removed or de-embedded from the fixture and device under test (DUT) measurements, to obtain only the response of the device. De-embedding can be ” post processed or observed in real time [Agi04]”. Post processing involves taking measurements exported in S-parameters- and the derived chain parameter matrices, T-parameters or ABCD parameters- and the negation of the test fixture contributions; whereas real time de-embedding involves the detuning of the calibrated test fixture model components from the measured results in the VNA.

2. 1. 5SOLT calibration technique

The SOLT in-fixture calibration technique relies on three known impedance and transmission standards defined along the reference plane. These standards are described as the Short, Open, Load, and Thru standards. A two-port SOLT calibration seeks to obtain the modelled 12 error terms from a typical coaxial test system. These errors, described by the notation, separate the DUT measurement from the ideal and are characterized during system calibration. A twelve term error model includes all ” significant systematic effects [Agi00]” for any 2-port measurements, and is more efficient than the eight –term error model. A forward reflection calibration obtains, and , terms while the reverse calibration finds, and terms. The thru standard gauges the transmission frequency response, and , in each direction, with the load terms, and , also in each direction, from matched port measurements at a time. Terminating both ports and removing the thru, while measuring the insertion loss would reveal any observed leakages between the ports, hence deriving the isolation term and . The error terms are described as follows:= Forward (Port 1) Directivity= Reverse (Port 2) Directivity= Forward (Port 1) Source Match= Reverse (Port 2) Source Match= Forward (Port 1) Reflection Tracking= Reverse (Port 2) Reflection Tracking= Forward (Port 1) isolation= Reverse (Port 2) isolation= Forward (Port 1) Load Match= Reverse (Port 2) Load Match= Forward (Port 1) Transmission Tracking= Reverse (Port 2) Transmission TrackingThe calibration measurements provides more information than is required for the determination of these 12 terms, and is said to be over determined, because each of the error terms in the model is solved for twice. While popular, it is not without some drawbacks, principal of which is its ” dependency on accuracy of the standards [War02]” as any deviation from the ideal can lead to large errors; in addition realising the standards in ” no-coaxial forms such as the microstrip layout [War02]” is a challenge; it is also unwieldy for ” measurements conducted at frequencies above 20GHz [War02]”. The flow diagram for the forward error terms in the two port error model is shown in figure 2. 1; the error model for the reverse direction is the same as figure 2. 1, but with the terms replaced by the reverse terms. Figure 2. 1: Signal flow diagram of the forward two-port error terms [Agi04]

2. 1. 6TRL Calibration technique

The TRL (Thru-Reflect-Line) calibration technique relies on the ” characteristic impedance of simple transmission lines rather than on a set of discrete impedance standards [Agi00]”. Its popularity has birthed a number of derived variants such as the LRM (Line-Reflect-Match) and the LRL (Line-Reflect-Line). Essentially it uses a short length thru-or one assumed to be of zero length, a highly reflective element and a non-zero length transmission line. For a two-port measurement system, each of the four S-parameters are obtained for each standard, hence twelve parameters can be measured. The flow diagram for the TRL standard is shown in figure 2. 2Figure 2. 2: Flow diagram of the TRL standardWith respect to the twelve-term error term model, TRL is only capable of obtaining ten out of the twelve terms from the a system of linearly independent equations; the missing terms are the forward and reverse isolation terms. An ” isolation calibration with two loads (as with the OSLT calibration) [Cal03]” is imperative if these terms are to be extracted. The TRL technique is well suited for measurements conducted in the microwave frequency band, less complex than the SOLT and it does not require a ” complete electrical description of the standards [Gol08]”- although it is assumed that each standard exhibits certain electrical criteria. TRL can remove a ” fixture’s loss and length effects [Agi00]”, but does not eliminate the ” effect due to the mismatch of the fixture [Agi00]”. Table 2. 1 makes a summary of these techniques with respect to the simplicity of application, accuracy, fixture assumptions and parameters affected. Table 2. 1: Summary of the calibration techniques

Technique

Simplicity

Precision

Applicable at Microwave Frequencies

Parameter Affected

Fixture Assumptions

Electrical delay

ACNoSingleNo loss or mismatch

Port extension

ACNoPort 1:

, ,

Port 2:

, , ,

No loss or mismatch

Normalization

BBNoSingleNo mismatch

Time Domain gating

BBYesorNo loss: Responses are well seperated

SOLT

CBNoAllIn-fixture standards are availableBBYesAllNo mismatch; Simple in-fixture standards are availableA= moreC= less [Agi00]

2. 2 Scattering Parameters Theory

S-parameters are power wave descriptors that permit the definition of the ” input-output relations of a network in terms of incident and reflected power waves [Lud00]”; and are definitive conventions for the de-embedding process, providing an indication of transmission and reflection performance of a device. The general description of S-parameters for an N-port network can be reduced to the vector:,(2. 1)where, b=, are reflected or emanating waves for port 1, 2, 3,…, N (2. 2), , defines the ratio of the amplitudes of the wave transmitted through port, i , to that incident on port j. Ports in the general sense apply points of entrance or exits, and in this instance, measurements of a circuit. Developing from that, we can say that, , is the ration of the incident and reflected waves for port, ii. (2. 3)a=, incident waves for port 1, 2, 3…, N (2. 4)Thus, for a two-port network as shown in figure 2. 3: C: UsersPublicDocuments5980-2784EN_2_figure. jpgFigure 2. 3-Two port S-Parameters network [Agi04]we have,(2. 5)Expanding the matrix in equation (2. 5) yields (2. 6) and (2. 7):(2. 6)(2. 7)The S-parameters are defined thus:(2. 8)= Input reflection coefficient with the output port terminated by a matched load.(2. 9)= Output reflection coefficient with the input port terminated by a matched load.(2. 10)= Forward transmission (insertion) gain with the output port terminated in a matched load.(2. 11)Reverse transmission (insertion) gain with the input port terminated in a matched load. We can also extend the relationship into power waves in this manner: And, consequently obtain:(2. 12)(2. 13)(2. 14)(2. 15)This allows us to denote equations (2. 12) to (2. 15) in dB as: Input Return Loss (RL) = Insertion Loss (IL) = Reverse power gain= Output Return Loss = The mathematical process of de-embedding entails the representation of the test fixture and DUT, in signal flow graphs, such that both test fixture halves and the DUT constitute three segments. The measured S-parameters are converted to T-parameters, through the mathematical relationship between chain T-parameters and S-parameters- to make network analysis manageable, allowing for network decomposition and de-embedding. C: UsersPublicDocuments5980-2784EN_2_pg5. jpgFigure 2. 4-Two port S-parameter network [Agilent De-embedding and Embedding]In essence, we obtain:,(2. 16)where,= T-parameter of the test fixture and DUT derived from converted the S-parameter equivalent.= T-parameters of the left segment of the test fixture derived from the S-parameter equivalent.= T-parameters of the right segment of the test fixture derived from the S-parameter equivalent. T is described with matrix elements in equation (2. 17),(2. 17)The relationship between T and S parameter matrices in given in the appendix C. Also, by taking advantage of the identity rulewhere,(2. 18)We, obtain the following from (2. 18):=(2. 19)Hence, equation (2. 19) effectively makes for the extraction of the DUT’s parameters, which after back conversion to S-parameters enables its characterization. Since the modelling of the each half of the test fixture is pivotal to the de-embedding process. Several circuits attempt this, but the simplest assumes the ” fixture halves to be composed of perfect transmission lines of known electrical lengths, on a lossless transmission line that is matched to the characteristic impedance of the system [Agi04]”. Electrical length is as a composed of the length of the line in wavelengths and phase constant, which for matrix and S-parameter models, are represented by a phase angle. For a reciprocal 2-port network matched to the characteristic impedance, the reflection coefficient is zero, .(2. 20)(2. 21)Thus we can effectively describe a fixture model that accounts for the phase lengths between the measurements and DUT. For a special length quarter-wave, at a defined frequency, the length is given as,

;

the electrical length,

= ;

and using the translation in equations (described in Appendix C) we derive that the entire fixture phase length for both halves in equations (2. 22) and (2. 23)=(2. 22)=(2. 23)We de-embed, essentially, by finding the zero crossing of the S-parameter quantity phase which also defines the resonant frequency of the network.

2. 3Microstrip Configuration

Adaptation of the microstrip for a coaxial line termination is hinged on the definition of its geometric dimensions such that they result in the desired characteristic impedance and electrical lengths. In addition to its dispersion reactance, frequency dispersion, surface wave excitation, the most ” important parameters for designing a transmission line are the characteristic impedance (), effective dielectric constant () and attenuation constant ( [Bah03]” and thickness of the strip. The effective dielectric constant is dependent on the nature of the material, and impacts on the resulting geometric dimensions of the strip. The relationship that ties these quantities together is described in the closed form expression for and with conductor thickness t= 0, are as given in (2. 24) and (2. 25); a microstrip configuration is shown in figure 2. 5. where ohm and(2. 26)C: UsersPublicDocumentsLumped_Elementsfor_RF_and_Microwave_Circuits_B_Microstrip. jpgFigure 2. 5: Microstrip configuration [Bah03]This report would adopt the simple model, which for a low loss dielectric material and well matched coaxial to non-coaxial transition, would provide an acceptable measurement accuracy for the in-fixture calibration procedure. By employing either the electrical delay or port extension calibration procedure, the entire fixture and coaxial to non-coaxial transitions of both halves, without the DUT, can be defined in electrical lengths, with the total fixture, expressed in electrical lengths-or phase delay, serving as reference plane. It is imperative for the DUT to be placed in the middle of the fixture for the accuracy of this process.

2. 4 Intrinsic Models for Capacitor and Inductor SMDs

The electric behaviour of Capacitors, Inductors and Resistors, in RF frequencies, are conveniently described with lumped RLC networks. This is because a ” simple resistor, capacitor, or inductor cannot be counted on to provide pure resistance, capacitance, or inductance in high-frequency circuits [Dav01]”. These lumped equivalent circuit models consist of basic circuit elements (C, L or R) with their associated parasitics. At RF frequencies, these contributions are from the ” inter-turn and ground plane effects [Bah03]” for inductors; ” parasitic inductances due to finite size and series resistance from contact and electrode resistance” for capacitors, in addition to parasitics from the ” inductance of the leads [Lud00]”. Hence for an SMD capacitor, the equivalent lumped circuit would entail an RLC series combination of ” capacitance from the parallel plates, series resistance describing losses in the lead conductors and a parasitic lead inductance [Lud00]” as shown in figure 2. 6: This equivalent circuit without fixture and SMD mounting effects constitute the intrinsic parameters for the SMD conductorFigure 2. 6: Intrinsic RLC equivalent circuit of the SMD capacitorBy the same token, for an SMD inductor, its equivalent lumped circuit would be defined by a representation of the combination of a series resistance from ” conductor windings with its inductance and distributed capacitance from the aggregate of the individual capacitances of the coil [Bow82]”. This equivalent circuit without fixture and SMD mounting effects constitute the intrinsic parameters of the SMD inductorFigure 2. 7: Intrinsic RLC equivalent circuit of the SMD inductorThese equivalent circuits for both capacitor and inductor would be used for the measurement to follow with derived values from AWR Microwave Office’s optimization kit.

2. 5Extrinsic circuit models of Inductor and Capacitor SMDs

An SMD when placed on the (Printed Circuit Board) PCB must have in addition to the intrinsic parameters described in figures (2. 6) and (2. 7) respectively, additional extrinsic parameters. These additions represent the interactions between the SMDs and the board. It is pertinent to define these models and obtain their electrical parameter dependencies.

2. 5. 1 Inductor Model Electrical dependencies Derivations

For the extrinsic equivalent inductor model circuit in figure (2. 8), the behaviour of the model over a frequency range depends on the location of self-resonant frequency and Q factor . We would proceed with circuit theory to determine these relationship as follows: Figure 2. 8: Equivalent extrinsic inductor model circuitWe know that the resonant frequency and Q factor are related by the expression in equation (2. 29) and (2. 30)(2. 29) [Nai01b](2. 30) [Bah03]where, and are the inductance and resistance at the resonant frequency;, the resonant frequency is computed from the ” observed 3 dB impedance bandwidth[Bah03]”, The impedance is frequency dependent and can be expressed is a function of frequency, , as the sum of the real and imaginary part impedances in equation (2. 32): It is obtained from S-parameters measurements, which are transformed first into the admittance parameters and finally into the impedance from expressed as equation (2. 33) by using the following expressions derived from [Poz98] as shown in the Appendix D:. The impedance in equation (2. 32) can be written as equation (2. 34) (see Appendix A for derivation)At the resonant frequency, is equivalent to , a real number at impedance; hence, substituting equations (2. 29) and (2. 30), in equation (2. 34) we obtain: The self-capacitance of the windings can be derived from (2. 29) as: Hence, derivation of the C is hinged on the resonant frequency, quality factor and impedance at resonance. The frequency varying components, ” andare derived from measured S-parameters, and after transformation in domain results as follows: and, Equations (2. 37) to (2. 39) are sufficient for the modeling of the inductor for the frequency range of measurement. It would be observed that at resonant frequency the equivalent circuit is completely resistive as both capacitor and inductance elements cancel. In addition beyond this resonant frequency, the impedance is predominantly capacitive and below this frequency the impedance is predominantly inductive.

2. 5. 2 Capacitor Model Electrical dependencies and Derivations

For the extrinsic equivalent capacitor model circuit in figure (2. 9), the behaviour of the model over a frequency range depends on the location of self-resonant frequency and Q factor . Capacitors have a series self-resonant frequency due the parasitic inductance, as explained in background theory, which is also shown in figure 2. 9. We would proceed with circuit theory to determine these relationships as follows: Figure 2. 9: Equivalent extrinsic capacitor model circuitThe resonant frequency for the circuit is derived as equation (2. 40)2. 40) [Bah03]Using the duality principle, from the inductor model, we conclude that the stray inductance, L, is unvarying in frequency, thus leaving and to be determined from equation (2. 33). As was with the inductor, we obtain the resonant frequency, and . The quality factor is as given in equation (2. 41)2. 41) [Bah03]The impedance of the network is obtained from the series addition of L , R and C impedance components as expressed in (2. 42)Equation (2. 42) reduces with the substitution of (2. 40) and (2. 41) toAt the resonant frequency from (2. 40); And equation (2. 42) becomes (2. 45) with the substitution of (2. 44) and (2. 41) in (2. 43) to become: At frequencies outside of the resonant frequency (2. 43) ” reduces toand, Equations (2. 44), (2. 46) and (2. 47) are sufficient for the modeling of the capacitor for the frequency range of measurement. It would be observed that at resonant frequency the equivalent circuit is completely resistive as both capacitor and inductance elements cancel. In addition beyond this resonant frequency, the impedance is predominantly inductive whereas it is predominantly capacitive for frequencies below resonance.

Chapter 3

Measurement and Characterisation of the SMDs

3. 1 Calibration and measurements definition

The characterization of SMDs requires a knowledge of their direct current resistance, self-resonant ” frequency, Q factor and their ideal capacitance or inductance [Men09]” for capacitor and inductor respectively. Since these devices are equipped with two access ports, for input and output signal terminations, two port measurements are imperative. The Vector Network Analyser (VNA), HP8753D, equipped with two ports and capable of making all S-parameter was consequently well suited for the tasks at hand. This VNA, HP8753D, with a frequency sweep range from 30 kHz to 3 GHz, was employed for the test. Two, 90degs, 50 ohms Sub-Miniature Version A (SMA) radio frequency (RF) Jacks ensured the connection of the test fixture, with the DUT, via coaxial cables to the Vector Network Analyser. The two-port calibration of the VNA was by the 3. 5 mm, 85033D Calibration Kit. Since this calibration was done at the coaxial ports, it effectively removed the effects of the network analyser, cables and adapters. The effects of the fixture were not accounted for, hence making it imperative to adopt one of the in-fixture standard calibration and de-embedding techniques described in chapter two. The rationale for any adopted technique includes the ” degree of accuracy desired, availability of calibration standards and the amount of time [Gol08]” available to undertake a measurement. For this report the electrical or phase delay in-fixture calibration procedure would be employed, ostensibly from the simplicity of application. It can also be described as a stripped version of the TRU calibration standard, since it incorporates the THRU component. In essence, it takes a single fixture, composed of two fixture halves connected together, and measures the phase delay or electrical length over the frequency of span of interest; then it sets this as the reference plane for results obtained from the VNA for composite fixture and DUT, hence removing the effects of the fixture. This calibration method is based on the following assumptions: that the coaxial calibration is performed as close as possible to the coaxial to strip transitionthe test fixture response approximates to a perfect transmission line of a known lengthit has no loss, the phase response is linear and the impedance is constant over the measurement range. It however does not compensate for discontinuities due to impedance variations along the length, fixture losses and the interactions between the coaxial to fixture termination, despite these shortcomings, it is sufficient for this project phase and would form the spring board for the TRL calibration techniques in the main project.

3. 2 Measurements Setup and Description

The test fixture was adapted for the measurements with a microstrip line mounted on a PCB board. Figure 3. 1, shows the measurement setup with the HP8753D, the adapted test fixture on PCB, and the SMD component to be characterized. Figure 3. 1: Photograph of the measurement setup and an enlarged insert picture of the test fixture on the PCBThe microstrip line is designed to for a characteristic impedance of 50Ω, to ensure minimal return loss or signal reflection. Its geometrical dimensions were obtained from the transmission line tool kit in Microwave Office™ 9. 06r build (AWR Corporation, 2010), from computed values for a quarter wave line, on an FR4 substrate with dielectric permeability of 4. 7; a loss tangent value of 0. 001; thickness of 17. 5m, and height of 0. 8mm. The results obtained from the transmission line toolkit indicated a length of 13. 351 mm and width of 1. 436mm for the microstrip. The schematic layout of the measurement setup is also shown in figure 3. 2: C: UsersPublicDocumentsProject_MaterialsSchematic_main. jpgFigure 3. 2: Schematic layout of measurement setupA microstrip line of length 13. 351 mm and width of 1. 436mm was printed on a (25 x 25) size board. Spacing for the SMD, between the pads was set to 1. 0 as here depicted. Figure 3. 3 shows the test fixture dimensions in mm. C: UsersPublicDocumentsProject_MaterialsMicrostrip_AutoCAD. jpgFigure 3. 3: Dimensions (in mm) of the test fixture on PCBThe characterization of two devices were set to be obtained: One for a commercially available SMD inductor: the 0603C type 68nH ( 5%) inductor, produced by Epcos. Another a commercially available SMD capacitor: the 0603 type 3. 3pF ( 0. 25pF) capacitor, produced by Yageo. Both components find extensive applications in the RF industry as indicated by their manufacturers. The characterization began with the measurement of the total microstrip length of both halves on a fixture, as one unit, for its response over the frequency range. Its insertion and return loss response and phase delay are as shown in figure 3. 4 and figure 3. 5 respectively. Figure 3. 4: Insertion and Return loss of the full microstrip lineFigure 3. 5: Phase delay for the total fixture halvesAs observed in figure 3. 4, a near zero insertion loss and frequency dependent return loss indicate a fairly well behaved microstrip line, since the insertion loss is under ” 0. 5, and return loss is less than -20. The phase delay for the full line thus allows us to negate the fixture effects by halving the value at the indicated frequency for each section and adding them to the transmission line coupled to the equivalent circuit models. These responses are in agreement with expected transmission line characteristics as indicated in [Cal03].

3. 2. 1 Inductor Characterization and Measurement Data

The characterization of the inductor would include the determination of the self-resonant frequency of the component, since the device is not pure and consists of self- capacitance contributions from the coil. This frequency is marked by the following conditions:” The 2-port phase (e. g. S21) angle is zero, crossing from negative at lower frequencies to positive at higher frequencies. The 2-port insertion loss (e. g. S21 dB) is at a minimum in its plot vs. frequencyThe input impedance is at its peak. The effective inductance or capacitance is zero; its Q factor is also zero. [Coi03]” The identification of any of these from the measurements would be useful for the determination of this frequency and consequently other lumped element properties. The procedure required that the inductor be mounted on the microstrip test fixture, as would be expected in a typical microwave circuit environmentA photograph of this setup is as indicated in figure 3. 6. C: UsersPublicDocumentsProject_MaterialsSMD_mounted_copy. jpgFigure 3. 6: SMD on fixtureMeasurements were made for, , and and the results saved and exported via a floppy-to-USB terminal for analysis on AWR 2010™ (Microwave Office). The two-port analysis of the Touchstone file in figure 3. 7 indicated the following response results in figures 3. 8 and 3. 9 : Figure 3. 7: Two-port circuit setup for measurements analysisFigure 3. 8: Phase response of the SMD inductor on microstripC: UsersPublicDocumentsS21_S11log_Chart. jpgFigure 3. 9: Insertion and Return Loss response of inductor on microstripThe self-resonant frequency is observed from figure 3. 7 and 3. 8; a phase crossing at 2. 5GHz, which also returned a minimal value of -47. 68dB for . It would be noted that the self-resonant frequency deviates slightly from the datasheet value of 2. 0GHz. Uncompensated contributions from the substrate and mismatch losses from the coaxial to strip transition make for this shift of self-resonance. AWR 2010 optimization provided the advantage of obtaining the values of the equivalent circuit of the inductor as indicated in figure 3. 9, without the rigour of algebra and back-substitution. S-parameters and obtained from the touchstone file were set as reference, and matched against the equivalent circuit model, with R, C and L values made tuneable. The results were derived by defining a minimum difference, for the resulting output equation statement with S21 and S11 responses for both circuits compared and set to ensure a convergence, over a number of iterations. The resultant values for the equivalent circuit is as shown in figure 3. 9: Figure 3. 9: Equivalent circuit for Inductor with element valuesThe obtained element values reveal the following: The inductance value obtained was well within tolerance range stated by the manufacturer (685%), hence justifying the calibration approach employed.

3. 2. 1. 1 Validation of the equivalent circuit model

In order to validate the model, the response for this equivalent circuit was compared with that of the VNA Touchstone file for the inductor. Figures 3. 10 and 3. 11, reveal a good correlation between the response for the equivalent model and SMD inductor measurements. C: UsersPublicDocumentsS11log_Chart_for_Dembedded_Circuit_and_File. jpgFigure 3. 10: Insertion Loss response comparison of equivalent circuit and measurementC: UsersPublicDocumentsS21_Compare. jpgFigure 3. 11: Return Loss response comparison of equivalent circuit and measurementThis agreement is especially marked in regions close to the resonance frequency.

3. 2. 2 Capacitor Characterization and Measurement Data

Following a similar procedure with the inductor, characterization of the capacitor would include the determination of the self-resonant frequency of the component, since the device is not pure and consists of parasitic lead inductance contributions with dielectric losses. The determination of this frequency is marked by any of the following conditions:” The 2-port phase (e. g. S21) angle is zero, crossing from negative at lower frequencies to positive at higher frequencies. The input impedance is at its peak. The 2-port insertion loss (e. g. S21 dB) is at a minimum in its plot vs. frequencyThe effective inductance or capacitance is zero; its Q factor is also zero. [Coi03]]” The identification of any of these from the measurements would be useful for the determination of this frequency and consequently other lumped element propertiesTo obtain parameters for the characterization of the capacitor, the capacitor was mounted on to the microstrip test fixture on a PCB, as would be expected in a typical microwave circuit environment. Measurements were taken for, , and and the results, also saved and exported, via a floppy-to-USB drive terminal, for analysis on AWR 2010 ™(Microwave Office). The two-port analysis of the Touchstone file in figure 3. 12 indicated the following responses in figure 3. 13: C: UsersPublicDocumentsCapacitor_layout. jpgFigure 3. 12: Two-port circuit setup for measurements analysisC: UsersPublicDocumentsS11_S21_Original_file_adjusted. jpgFigure 3. 13: Insertion and Return loss from measurementsThe self-resonant frequency is observed from figure 3. 13 as the minimal value of of -36. 68dB attenuation at 2. 803GHz. As with the inductor measurements above, AWR 2010™ optimization routine provided the advantage of obtaining the values of the equivalent circuit of the capacitor without the rigour of algebras and back-substitution. The resultant circuit is shown in figure 3. 14. This was done setting the resonant frequency of the transmission line to that obtained in the figure 3. 13 and the S-parameter, and , measurement results obtained from the touchstone file set as reference in the routine, with respect to those of the equivalent circuit model-with tuneable R, C and L to produce an equation. This equation was made to yield minimum difference in the S21 and S11 responses, for both circuits, over a number of iterations.. The resultant values for the equivalent circuit after the completion of the optimization is as shown in figure 3. 14: Figure 3. 14- Equivalent circuit for Capacitor with element values. A look at the obtained element values reveals the following: The capacitance value obtained corresponds closely with the value stated by the manufacturer 3. 3pF ( 0. 25pF).

3. 2. 2. 1 Validation of the equivalent circuit model

In order to validate the model, the response for this equivalent circuit relative to that of the SMD file parameters were compared. Figures 3. 15 and 3. 16 reveal a good agreement between the model and the measurement for the S-parameters. C: UsersPublicDocumentsCapacitor_model_. jpgFigure 3. 15: Return Loss Phase response comparison of equivalent circuit and measurementC: UsersPublicDocumentsCompare_Capacitor_S21_model. jpgFigure 3. 16: Return Loss response comparison of equivalent circuit and measurementThe validity of the results is reinforced by the correlation in the magnitude and phase responses of the both equivalent circuit and capacitor touchstone file measurements.

Chapter 4

Summary and ConclusionThe characterization of SMDs depends on various electrical parameters, and are influenced by the effects of the fixture and operating frequency. An SMD’s extrinsic equivalent circuit model considers the effect of parasitic contributions from the board and layout characteristics. The procedure for the characterization for SMD capacitors and inductors entailed the phase delay calibration technique and the determination of the lumped element equivalent circuit values with the AWR Microwave Office optimization tool kit. These results were validated with the observed correlation in the responses obtained from the measurements with respect to that of the equivalent model circuit. Deviations from the intrinsic datasheet values were within tolerable amounts, and admissible, considering the choice of calibration technique. Looking forward, the TRL calibration technique would be adopted for latter stages of this work and would aim to correct the drawbacks associated with the phase delay approach. The rationale for this choice derives from the efficient systematic error correction routine it guarantees, and coupled by is the availability of non-coaxial based standards for measurements conducted in microwave frequencies. We will proceed to develop this technique with the aim of setting the stage for the main project phase in the accompanying section.

4. 1Development of the TRL Calibration standard for Device modelling in the main project phase

As indicated in section 2. 1. 6, TRL calibration is a 2-port calibration techniques that results in the 12-term error correction model, as with the SOLT (Short-Open-Load-Thru) technique, although it corrects all but two of the error terms. The latter is finds ready application in measurements conducted with coaxial, and well determined standards, and provides a complete solution to the error terms described in section 2. 1. 5. TRL, on the other hand, enjoys popular use with the employment of transmission lines as reference standards and makes for easy adaptation in the microstrip environment. These transmission lines have their impedances readily determined from geometric and substrate (material) properties as shown in section 2. 3. Three basic steps are involved in the TRL 2-port calibration technique. Following the order of description; the first step is called the THRU calibration step; the second step is called the REFLECT step, while the third step is called the LINE step. For the THRU step , the test ports are connected together with a short transmission line, assumed to be of zero length, or alternatively by direct connection of the two ports. The transmission line should have an insertion and return loss under ” 0. 5 and -20 [Cal03]” respectively, for the frequency test range. In addition, the electrical length must also have been defined as described in section 2. 3In the REFLECT step, highly reflective and identical 1-port elements or standards are connected to each test port. The transmission coefficient should be ” very small, at least -30 and a reflection coefficient close to 0[Cal03]”. The phase of the reflection coefficient would be specified to be within or . This would ensure that a error in the measured phase from computation for the error model does not result. In the LINE step, a short length of transmission line, of a different length from that of the THRU is inserted between the ports. The insertion phase is specified to be within and must be different from that of the THRU; in addition, the reflection coefficient must be made identical at the ports. The LINE impedance is also defined to be as the that of the system, 50Ω. The flow graph of the TRL standards is as shown in figure 4. 1Figure 4. 1-TRL standards flow graphsAnattenuator preferably, ” 10, would be required to improve the effective match of the system [Agi00]”, between the source and load, since attenuators usually have a return loss better than that of a network analyser. After the definition, of these standards on the calibration kit, calibration as described above would proceed with fixture in place, and the specification of the stimulus conditions for the measurements. These stimulus conditions include, the start and stop frequencies and number of measurement points. After the calibrations, the device would be connected between the fixture halves and all four S-parameters measurements would be taken and updated. This evaluation would extend into shunt orientation for the SMD in the fixture layout. A project plan table and Gantt Chart have been included for this proposal in Appendix B.

Appendix A

Equations DerivationThe impedance in equation (2. 32) can be re-written to give the followingFrom equations (2. 29) and (2. 30), we deduce thatHence, equation (A. 2) becomes:

Appendix B

Grant Chart Table and ChartTask NameDurationStartFinish

Main Project Definition Phase

4 days

Wed 19-06-13

Mon 24-06-13

Start0 daysFri 02-11-12Fri 02-11-12Plan4 daysWed 19-06-13Mon 24-06-13

Main Project Phase

319 days

Wed 19-06-13

Mon 08-09-14

TRL Calibration set design for SMD measurements5 daysWed 19-06-13Tue 25-06-13Implementation with Microwave Office to fit results and proposed models5 daysWed 26-06-13Tue 02-07-13Measurement of a range of standard components and7 daysWed 03-07-13Thu 11-07-13Investigation of the contributions of planar circuits7 daysFri 12-07-13Mon 22-07-13Exams13 daysThu 01-08-13Mon 19-08-13Results analysis7 daysTue 23-07-13Wed 31-07-13Suggestions, improvements & summary7 daysThu 01-08-13Fri 09-08-13

Project Implementation Report

28 days

Fri 12-07-13

Tue 20-08-13

Main report draft3 daysMon 12-08-13Wed 14-08-13Review of Main report draft by Mr Clarke4 daysThu 15-08-13Tue 20-08-13Feedback/ modifications4 daysFri 12-07-13Wed 17-07-13

Dissertation/Final Report

31 days

Thu 18-07-13

Thu 29-08-13

Dissertation Report23 daysThu 18-07-13Mon 19-08-13Dissertation and addendum draft13 daysThu 18-07-13Mon 05-08-13Review and redraft of dissertation4 daysTue 06-08-13Fri 09-08-13Final review by Mr Clarke4 daysTue 13-08-13Fri 16-08-13VLE Submission1 dayMon 19-08-13Mon 19-08-13

Appendix C

Relationship between S and T parameter matricesThe relationship between the S and T parameters of a 2 port network in figure C1 requires that the incident and reflected waves are arranged such that the former is related to port 1 and the latter to port 2. This becomes relevant with regard to the cascading of networks that makes T parameters more convenient for use. C: UsersIsiborDocumentsAgilent_photo_port1. jpgFigure C1-Two port network [Agi04]The two-port network can be described by the T-parameter matrixThe mathematical relationship between T and S parameters are as described in C. 2 and C. 3:(C. 2)and(C. 3)

Appendix D

S-parameter, impedance and admittance conversion formulas. where, is the characteristic port admittanceWith a reciprocal matrix, we have that, which translates to,

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